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We introduce 0.18 pn CMOS with multi-Vth's for mixed high-speed digital and FW-analog applications. The vth's of MOSFETs for digital circuits are 0.4 V for NMOS and -0.4 V for PMOS, respectively. In addition, there are nMOSFETs with zero-volt-Vth for RF analog circuits. The zero-volt-Vth MOSFETs were made by using undoped epitaxial layer for the channel regions. Though the epitaxial film was grown by reduced pressure chemical vapor deposition (RP-CVD), the film quality is good because higher pre-heating temperature (940 O C for 30 seconds) is used in H2 atmosphere before epitaxial growth. The epitaxial channel MOSFET shows higher peak &n and fT than those of bulk cases. Furthermore, the g,,, and fT values show significantly improved performances under the low supply voltage, which is important for 0.18 pm CMOS with low power 1 low supply voltage operation. Additionally, in our experiment no significant difference was observed between the reliability of gate oxide grown on bulk and the reliability of that grown on epitaxial layers. The undoped-epitaxial-channel MOSFETs with zero-Vth will be effective to realize high performance and low power CMOS devices for mixed digital and RF-analog applications.

For the first time, we demonstrate standard cell gate density of 3650 KGate/mm 2 and SRAM cell of 0.124 μm 2 for 32nm CMOS platform technology. Both advanced single exposure (SE) lithography and gate-first metal gate/high-k (MG/HK) process contribute to reduce total cost per function by 50% from 45nm technology node, which is unattainable by dual exposure (DE) lithography or double patterning (DP) and poly/SiON gate stack.