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WSI is one of promising technologies for developing ultra-computer, neurecomputer, and marsively parallel computer which satisfy the continuous increasing demand for computing power. This paper presents a self-reconfigurable algorithm for the novel redundancy WSI sorting network. Thc WSI sorting network consists of a mesh-interconnection and a modified bitonic sorter with spare cells. The fault tolerance performances of the WSI sorting network with hierarchical redundancy are discussed by using the self-reconfigurable algorithm.

Recent advances in V L S I technologv has stimulated research in mussively parallel computers to satisJv the continuousl? increasing demand for computer power in advanced science and technology applications. Mesh-intercortnection is one of the most attractive interconnections and architectures for massively parallel computers. This puper addresses a new reconjlgurable architecture to implement massively parullel meshurruys on a silicon wafer by wafer scale integration ( W S I I , which is expected as U promising technology to construct mussively parallel computers on silicon wafers. The performance of the proposed scheme is discussed with respect to system yield. It is confrmed that the reconfigurable architecture without global information on the fault distribution achieves the same system yield as the eurlier designs based on U gruph theoty which requires on the grobal information.

SUMMARYWith recent advances in VLSI technology, WaferScale Integration implementation is becoming realistic, wherein massively parallel multiprocessors are implemented on a single wafer. As a result of this technique, the connections among VLSI become unnecessary and a high-speed, high-density system will be realized. This paper considers the mesh-connected network, which is one of the configurations of the massively parallel multiprocessor system, and discusses the reconfiguration techniques in realizing the network on the wafer. The reconfiguration technique is necessary for composing a system on a wafer, and several techniques have been proposed to date. Most of these, however, are based on global information or can be applied only to special cases. Consequently, they are not suitable for the self-reconfiguration scheme of a massively parallel system. From such a viewpoint, this paper proposes and evaluates an autonomic self-reconfiguration scheme using only local information, wherein the nondeterministic algorithm is added to the conventional method. It is seen as a result that the proposed method can realize a higher yield than the conventional method, as the array size becomes larger and the portion of the redundant PE becomes less. 1