No abstract

A novel field-effect transistor based on a pseudomorphic InAs quantum well in a doped InGaAdInAlAs double hetemstructure is reported. Low-field mobility, electron peak velocity, and transistor performance are studied as functions of InAs quantum well thickness, where the InAs layer is in the center of a 3OO-W uniformly doped InGaAs/lnAlAs quantum well lattice matched to InP. Electron transport-both at low and high fields-along with transistor transconductance are optimal for structures with a 30-i% InAs quantum well. 'hansistors based on the InAs quantum well structures with 0.5-pm gate lengths yielded mom temperature extrinsic transconductances of 708 mS/mm, more than a 100% increase over those with no I d s .

We have studied electron transport in a variety of doped and modulation-doped InGaAs/AlInAs quantum wells within the context of field-effect transistor performance. Both quantum-well width and doping profile were varied with all layers lattice matched to the InP substrate. Electron transport properties in the structures were characterized using Hall, geometric magnetoresistance, and microwave velocity-field measurements, and transistor performance in terms of transconductance and channel current in 1.8- and 0.5-μm gate-length devices. Transconductances in 0.5-μm gate-length transistors were as high as 590 mS/mm and were more directly correlated to the peak electron velocity than to the low-field mobility.

We have investigated the formation of source-drain AuGe/Au and Ni/AuGe/Ni/ Au alloyed ohmic contacts to AlInAs/InGaAs/InP doped channel MODFETs, and observed lateral diffusion of the contact system after the standard annealing procedure at the temperature range of 185 to 400°C. Auger depth profiling of contacts annealed at 250°C, revealed that Au(Ge) diffused through the top InGaAs and AlInAs layers into the active InGaAs layer, but had reduced penetration into the AlInAs buffer layer. This reduction in diffusion along the depth axis at the AlInAs buffer layer boundary is believed to result in enhanced lateral diffusion and the observed lateral encroachment of the contacts. Both Au and Ni containing contact systems showed similar behavior in terms of lateral diffusion with encroachment extending between 0.25 and 0.5 µm at the periphery of the contacts for annealing temperatures between 300 and 400°C. A controlled ramp-to-peak temperature annealing procedure is developed to suppress such lateral diffusion effects. Low temperature annealing (250°C) using this procedure resulted in equally low contact resistance values (~0.1 Ω-mm) and no lateral diffusion. It is concluded that in thin multilayered structures the modified annealing procedure presented here, is necessary for optimal ohmic contact formation.