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We have devised a novel antenna structure that distinguishes the regimes of charging during an etch process. Using this technique, we show instances in an Inductively Coupled Plasma (ICP) metal etch where charging occurs exclusively during metal clear or overetch or both depending on process and hardware. We have seen instances where ultra-thin gate (21A) devices are severely degraded compared to thicker gate (25-32A) devices under certain ICP metal etch process conditions. Remote Plasma Nitrided (RPN) oxides are shown to be robust down to 25A with respect to antenna effects. We report here for the first time enhanced passivation of plasma damaged device with deuterium anneal. IntroductionThe electron incident angle during an etch process has a much larger spread compared to that of the ions. The disparity in incident angles and the shading of electrons by photoresist result in a net positive stress to the device. This Electron Shading Effect (ESE) has been shown to play a critical role in antenna charging especially in advanced technology nodes with high aspect ratio features defined by high density plasma reactors [l]. Under these conditions, we have shown earlier that the microloading in conjunction with ESE could lead to high stress levels (10-fold) during the metal clear in tight geometries [2]. In addition, charging could also occur during the overetch regime. It is imperative for the process engineer to ascertain the regime where charging occurs to make prudent process changes for minimal damage. In this paper, we present a novel technique to separate damage during metal clearing from overetch. Concurrent with the use of high density reactors, the gate oxide is also being scaled down. Recent reports indicate that the effects of charging is much reduced at thinner gate oxides [3]. Further, novel gate dielectrics such as the Remote Plasma Nitrided (RPN) oxides may have to be employed to suppress boron penetration. Our investigations here address this scaling issue in the 21 to 32A range for thermal and Remote Plasma Nitrided (RI") oxides. Experimental ProcedureCharging is detected using novel antenna structures connected to CMOS devices using a 0.18pm process flow [4]. While the critical dimensions were held to the 0.18ym node, gate oxides down to 21A were studied to assess the effects of charging on succeeding technology nodes. Metal etch was performed in commercial ICP reactors using a BCI3/Cl2 chemistry. We measured the gate leakage (I&, threshold voltage (Vt), transconductance (g,) and charge-to-breakjdown (Qba) immediately following the metal etch. On select samples, we assessed the traps using charge-pumping and random telegraph signal (RTS), pre and post sinter. Results and Discussion A. Transient FuseWe define Ihe "Latent Antenna"[5] regime as the zone of etching around endpoint when the metal is cleared in the open areas, and remains in tight geometries (due to microloading). The "overetch" regime is the zone when the metal is cleared both in tight and wide geometries. We have previously shown using...

For future high performance logic semiconductor products it is essential to lower the dielectric constant k of the intra-and interlayer isolators in combination with Cu single and dual damascene metallisation (1, 2). In this paper we report on the first successful single and dual damascene integration of a porous Methylsilsesquioxane (MSQ) based spin-on dielectric, JSR LKD. Deposition, etch, resist strip, clean and CMP behaviour and electrical results from both single and dual damascene integration are discussed. JSRLKDOxide 2.3

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