SUMMARYThe switched-current (SI) technique permits realizing analog discrete-time circuits in standard digital CMOS technology. A very important property of the analog part of a system on a chip is the possibility it offers for realizing some functions of a digital circuit, but with reduced power consumption. In this paper, a low power SI integrator is presented. It is shown that an integrator consuming a fraction of a milliwatt can be designed in 0.35 m CMOS technology with the use of narrow transistor channels, and with the channel length as a design parameter. The impact of the rise/fall time of the clock signal on the integrator operation is observed. It is shown that this effect can be reduced when the proper switch dimensions are taken for the integrator. Analysis and measurements of the integrator noise are presented. The integrator was built with equal size transistors, yielding less sensitivity to variations in production parameters. An experimental chip in 0.35 m CMOS technology was fabricated, and measurements are compared with results obtained during analysis and simulations. In order to verify the properties of the designed integrator experimentally, a first-order filter is built with the use of elementary cells on the chip.

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Portable consumer products need low-cost, lowpower chips for realization of signal processing and image compression functions. In the paper a modification of such chip for digital video camera is presented. The chip contains image sensing array composed of photodiodes, twodimensional DCT processor and entropy coding section. The processor is designed in switched-current (SI) technique and contains current mirrors and memory cells. In order to examine these elementary cells, the experimental chip iu AMS 0.8pm technology was fabricated.

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