Charge retention in SAMOS structures at elevated temperatures is effectively described by a thermionic electron emission model from a floating polysilicon gate into the surrounding oxide. Experimental results showed sufficiently good agreement with the theoretical model. The barrier height and collision frequency derived from the experiments are reasonable (1.24 eV and 2.5×104/sec, respectively). Long term data retention in floating gate EPROM's can also be predicted by this model.

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The characterization of polycrystalline silicon MOS transistors and its film properties are studied, with special emphasis on the relationship between crystalline defects and carrier transport phenomena. An increase in mobility with gate field in polycrystalline silicon MOS transistors and also with doping concentration in polycrystalline silicon films is observed. These phenomena are interpreted as space charge scattering effects caused by a high density of dislocations in the films. U-shaped drain current vs gate voltage curves are observed both in p-channel and n-channel polycrystalline silicon MOS transistors. The anomalous drain current in the accumulation region is interpreted as junction breakdown at the drain edge caused by crystalline imperfections in the films.

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