A new concept for quadrature coupling of LC oscillators is introduced and demonstrated on a 5-GHz CMOS voltage-controlled oscillator (VCO). It uses the second harmonic of the outputs to couple the oscillators. The technique provides quadrature over a wide tuning range without introducing any increase in phase noise or power consumption. The VCO is tunable between 4.57 and 5.21 GHz and has a phase noise lower than -124 dBc/Hz at 1-MHz offset over the entire tuning range. The worst-case measured image rejection is 33 dB. The circuit draws 8.75 mA from a 2.5-V supply

The tuning curve of an LC-tuned voltage-controlled oscillator (VCO) substantially deviates from the ideal curve 1/√(LC(V)) when a varactor with an abrupt C(V) characteristic is adopted and the full oscillator swing is applied directly across the varactor. The tuning curve becomes strongly dependent on the oscillator bias current. As a result, the practical tuning range is reduced and the upconverted flicker noise of the bias current dominates the 1/f3 close-in phase noise, even if the waveform symmetry has been assured. A first-order estimation of the tuning curve for MOS-varactor-tuned VCOs is provided. Based on this result, a simplified phase-noise model for double cross-coupled VCOs is derived. This model can be easily adapted to cover other LC-tuned oscillator topologies. The theoretical analyses are experimentally validated with a 0.25 μm CMOS fully integrated VCO for 5 GHz wireless LAN receivers. By eliminating the bias current generator in a second oscillator, the close-in phase noise improves by 10 dB and features -70 dBc/Hz at 10 kHz offset. The 1/f2 noise is -132 dBc/Hz at 3 MHz offset. The tuning range spans from 4.6 to 5.7 GHz (21%) and the current consumption is 2.9 mA

Switched Biasing" is proposed as a new circuit technique that exploits an intriguing physical efect: cycling a MOS transistor between strong inversion and accumulation reduces its intrinsic 14 noise. The technique is implemented in a 0 . 8 p CMOS sawtooth oscillator by periodically of-switching of the bias currents during time intervals that theyare not contributing to the circuit operation. Measurements show a reduction of the lynoise induced phase noise by more than 8 dB, while the power consumption is reduced by more than 30% as well.

This paper gives experimental proof of an intriguing physical effect: periodic on-off switching of MOS transistors in a CMOS ring oscillator reduces their intrinsic 1=f noise and hence the oscillator's close-in phase noise. More specifically, it is shown that the 1=f 3 phase noise is dependent on the gate-source voltage of the MOS transistors in the off state. Measurement results, corrected for waveform-dependent upconversion and effective bias, show an 8-dB-lower 1=f 3 phase noise than expected. It will be shown that this can be attributed to the intrinsic 1=f noise reduction effect due to periodic on-off switching.

A new measurement setup is presented that allows the observation of 1 noise spectra in MOSFET's under switched bias conditions in a wide frequency band (10 Hz-100 kHz). When switching between inversion and accumulation, MOSFET's of different manufacturers invariably show reduced 1 noise power density for frequencies below the switching frequency. At low frequencies (10 Hz), a 5-8 dB reduction in intrinsic 1 noise power density is found for different devices, largely independent of the switching frequency (up to 1 MHz). The switched bias measurements render detailed wideband 1 noise spectra of switched MOSFET's, which is useful for 1 noise model validation and analog circuit design.