High-resistivity polycrystalline silicon (HRPS) wafers are utilized as low-loss substrates for three-dimensional integration of on-chip antennas and RF passive components (e.g. large inductors) in wafer-level chip-scale packages (WLCSP). Sandwiching of HRPS and silicon wafers enables to integrate large RF passives with a spacing of >150 µm to the conductive silicon substrate containing the circuitry, while providing mechanical stability, reducing form factor and avoiding any additional RF loss. Antenna performance comparable to glass substrates and high quality factors for large spiral inductors (Q=11 at 1 GHz; 34 nH) are demonstrated. The HRPS substrates have high dielectric constant, low RF loss, high thermal conductivity, perfect thermal matching, and processing similar to singlecrystalline silicon.

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Abstract-Self-heating effects on integrated suspended and bulk spiral inductors are explored. A dc current is fed through the inductors during measurement to emulate dc and radio frequency power loss on the inductor. A considerable drop in by 18% at 36.5 mW is observed for suspended coils with 3-m aluminum metallization compared to reference inductors on bulk-Si. Simulations in Ansoft's ePhysics indicate that, due to the thermal isolation of the suspended coil, the power loss from resistive self-heating in the metal has to be transferred outwards through the metal turns. This also results in a thermal time constant. This time constant is measured to be 10 ms, meaning that it can affect power circuits operating in pulsed mode.Index Terms-Micromachining, radio frequency (RF) circuits, spiral inductor, suspended inductor, thermal effects.

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High-resistivity polycrystalline silicon (HRPS) is presented as a novel low-cost and low-loss substrate for radio-frequency (RF) passive components in wafer-level packaging and integrated passive networks. A record quality factor (Q ¼ 11; 1 GHz; 34 nH) and very low loss (0.65 dB=cm; 17 GHz) are demonstrated for inductors and coplanar waveguides, respectively, on HRPS.