Heteroepitaxial growth of 3C–SiC on (110) Si substrates by chemical vapor deposition was carried out, and the grown epitaxial layers were investigated by high resolution transmission electron microscopic (HRTEM) analysis. The interface structure between 3C–SiC and Si substrates depended on the flow rate of C3H8 during the carbonization process. In the case of the growth under C3H8=0.4 sccm, the interface was flat and 3C–SiC layer was grown epitaxially on (110) Si substrate in a well-lattice-matched relationship of (110) Si//(111) 3C–SiC and [1̄10] Si//[1̄10] 3C–SiC. In contrast, the interface was rough under C3H8=1.2 sccm and polycrystalline 3C–SiC grew without epitaxial relationship to the substrate. HRTEM observations revealed that an atomically flat (110) Si substrate surface is significant in order to grow high quality 3C–SiC with suppressing the generation of stacking faults.

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The influence of surface pit shape on 4H-SiC double implanted MOSFETs (DMOSFETs) reliability under a high temperature drain bias test has been investigated. Threading dislocations formed two types of pit shapes (deep pit and shallow pit) on an epitaxial layer surface. The cause of the failure was revealed to be an oxide breakdown above the pit generated at the threading mixed dislocation in both pit shapes. Weibull distributions between two types of pits were different. Although the DMOSFETs on the epitaxial layer with the deep pit show longer lifetime than those with the shallow pit, the epitaxial layer with the shallow pit is suitable to estimate the lifetime of the DMOSFETs because of a linearity of the Weibull plot. The lifetime of the DMOSFETs with the shallow pit was dominated by an oxide electric field. The maximum oxide electric field required to obtain the lifetime of more than 10 years was estimated to be 2.7 MV/cm.

Hetero-epitaxial CVD growth of 3C-SiC on a Si(110) substrate gives a (111) crystal with low defects density. However, double positioning growth often disturbs growth of a single crystal. The growth on an off-axis Si(110) substrate suppressed propagation of the double positioning defects in the grown layer effectively. Cross-sectional transmission electron microscopy revealed the details of the suppression process on the off-axis substrate. The suppression mechanism and the origin of the defects formation at double positioning boundaries were interpreted by the growth model based on an anisotropic growth rate on (111) plane of 3C-SiC.

The effectiveness of room-temperature photoluminescence (PL) mapping was demonstrated for nondestructive detection of in-grown stacking faults in off-axis 4H-SiC bulk substrates and epitaxial layers. The use of a deep-UV light excitation is essential to detect the stacking fault related intensity pattern in the bulk substrates because of its shallow penetration depth. A bar-shaped PL intensity pattern agreed well with the etch-pit pattern due to the stacking faults in the bulk substrate. The expansion length of the bar pattern from a bulk substrate to an epitaxial layer corresponded to the projected width of basal plane in the epitaxial layer. These results allowed us to analyze the stacking faults propagated from the bulk substrate to the epitaxial layer.