A novel SON LDMOS with Triple-RESURF technology

Wang, Zhuo; Lu, Muting; Zhou, Xin; Wang, Jun; Yang, Weifeng; Zhang, Bo

doi:10.1016/j.spmi.2014.07.034

Cited by 3 publications

(1 citation statement)

References 8 publications

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“…limit' relationship of R on,sp ∝ BV 2.5 , which leads to high power consumption, many methods have been proposed to improve the trade-off relationship between the R on,sp and BV [4][5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21]. By introducing a P-type region into the N-drift, typical RESURF [6][7][8][9][10][11][12][13] and superjunction [14][15][16][17][18][19][20][21] technologies not only decrease the R on,sp by enhancing the depletion effect to increase the N-drift doping concentration (N d ), but also increase the BV by modulating the electric field distribution. However, the R on,sp of these methods is strongly dependent upon the N d , and charge imbalance will result in BV degradation.…”

Section: Introductionmentioning

confidence: 99%

Simulation and experimental study on a high figure of merit LDMOS with ingenious layout design

Wei¹,

Dai²,

Ma³

et al. 2022

Semicond. Sci. Technol.

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To improve the tradeoff relationship between the specific on-resistance (Ron,sp) and breakdown voltage (BV), a novel lateral double-diffusion metal-oxide-semiconductor field effect transistor (LDMOSFET) with ingenious layout design is proposed and investigated by simulations and experiments. The proposed LDMOS features a specific convex-shape field plate (CFP) structure at source side and two separated integrated diodes (SID) at the drain side. On one hand, a continuous electron accumulation layer is formed from source to drain in the on-state, providing an ultralow current path to decrease the specific on-resistance (Ron,sp). On the other hand, the CFP and SID structures allow the proposed device to make full use of the drift length to sustain the off-state voltage, so that the novel device could maintain the same BV level with a shorten drift length. Thus, the proposed CFP-SID LDMOS achieves a much lower Ron,sp and better Ron,sp-BV tradeoff relationship. The experimental results illustrate that the CFP-SID LDMOS realizes a BV of 518V and Ron,sp of 23.5 mΩ·cm2 with a high figure of merit (FOM) of 11.42MW/cm2. Compared with the triple-RESURF LDMOS under the same BV, the proposed device decreases the Ron,sp by 53.8%.

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