A sequential circuit structure with combinational test generation complexity and its application

Abstract

If, upon substituting signal lines for all flip‐flops in a sequential circuit, the test generation problem for this sequential circuit can be reduced to the problem of test generation for a combinational circuit, one may call this sequential circuit a sequential circuit allowing test generation with combinational test generation complexity. For example, balanced structures are characterized by this feature. The authors introduce a new wider class called internally balanced structures. The sequential circuits can be classified by the circuit structure as follows: {sequential circuits of acyclic structure} ⊃ {sequential circuits of internally balanced structure} ⊃ {sequential circuits of balanced structure}. It is shown that, as opposed to sequential circuits of acyclic structure, which do not necessarily allow test generations with combinational test generation complexity, sequential circuits of internally balanced structure and balanced structure allow test generation with combinational test generation complexity. On the other hand, it is shown that finite state machines (FSM) can be grouped by their realization possibility as follows: {FSM allowing realization as acyclic structure} = {FSM allowing realization as internally balanced structure} ⊃ {FSM allowing realization as balanced structure}. Finally, the authors discuss using features of the internally balanced structures which allow test generation with combinational test generation complexity for implementing designs for testability based on the new partial scan approach, and for reducing the test generation time in sequential circuits. © 1998 Scripta Technica, Syst Comp Jpn, 28(11): 11–21, 1997

Sequential test generation based on circuit pseudo-transformation

“…However, in return for this disadvantage, the proposed method can reduce test generation time for most circuits and can increase fault coverage for several circuits. 5 Conclusions…”

“…The test generation problem for a sequential cir-cuit capable of generating tests with combinational test generation complexity can be reduced to that for the combinational circuit formed by replacing each F F i n the sequential circuit by a wire. Balanced structures [4] and internally balanced structures [5] are known as sequential circuits capable of generating tests with combinational test generation complexity. In this paper, we shall present a test generation method using a CPT called combinational circuit pseudo-transformation(CCPT for short).…”

Partial scan design methods based on internally balanced structure

“…Capability of combinational test generation [6] : Let S be an acyclic sequential circuit and let C ( S ) be the C-transformed combinational circuit. The sequential circuit S is said to be capable of combinational test generation when it satisfies : a fault f in S is testable in S if and only if the corresponding fault fc in C ( S ) is testable in C ( S ) .…”

“…(See Fig. Internally balanced structure [6] : If the circuit S' transformed from S by using only the rule (1) of Ctransformation is a balanced structure, then S is said to be an internally balanced structure. (See Fig.…”

“…This is shown by the following theorem. From [6], if a sequential circuit S K is an internally balanced structure then SK is capable of combinational test generation, therefore, this leads to the next theorem.…”