A triple-mode continuous-time ΣΛ modulator with switched-capacitor feedback dac for a GSM-EDGE/CDMA2000/UMTS receiver

Abstract

Citation for published version (APA): Veldhoven, van, R. H. M. (2003). A triple-mode continuous-time sigma delta modulator with switched-capacitor feedback DAC for a GSM-EDGE/CDMA2000/UMTS Receiver. Abstract-Time jitter in continuous-time 61 modulators is a known limitation on the maximum achievable signal-to-noise-ratio (SNR). Analysis of time jitter in this type of converter shows that a switched-capacitor (SC) feedback digital-to-analog converter (DAC) reduces the sensitivity to time jitter significantly. In this paper, an and continuous-time fifth-order 61 modulator with 1-bit quantizer and SC feedback DAC is presented, which demonstrates the improvement in maximum achievable SNR when using an SC instead of a switched-current (SI) feedback circuit. The modulator is designed for a GSM/CDMA2000/UMTS receiver and achieves a dynamic range of 92/83/72 dB in 200/1228/3840 kHz, respectively. The intermodulation distance IM2, 3 is better than 87 dB in all modes. Both the and modulator consumes a power of 3.8/4.1/4.5 mW at 1.8 V. Processed in 0.18-m CMOS, the 0.55-mm 2 integrated circuit includes a phase-locked loop, two oscillators, and a bandgap. Index Terms-Mobile communication, telecommunication receiver, intermediate frequency (IF) conversion, GSM, EDGE, CDMA2000, UMTS, sigma-delta analog-to-digital converter (ADC), sigma-delta modulator, switched-capacitor (SC) digital-to-analog converter (DAC), reduced jitter sensitivity.

On incremental sigma-delta modulation with optimal filtering

“…Σ∆ quantization systems, also known as scalar predictive quantizers or oversampling Analog-to-Digital converters, are widely used in audio systems [1,2] and communication systems [3,4,5]. These systems can achieve very large dynamic range without the need for precise matching of circuit components.…”

“…This is especially attractive for implementation in scaled technologies where transistors are fast but not very accurate. They are also among the most power efficient ADC architectures [4].…”

Multirate Cascaded Discrete-Time Low-Pass ΔΣ Modulator for GSM/Bluetooth/UMTS

“…Each communication standard (in this work GSM, Bluetooth and UMTS) requires a certain resolution specification and hence a different order for the noise shaping [14], [15]. In a cascaded architecture, the modulator order is not fixed by the most demanding communication standard.…”

A 32-mW 320-MHz Continuous-Time Complex Delta-Sigma ADC for Multi-Mode Wireless-LAN Receivers

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