2015
DOI: 10.3390/app5040682
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Analysis of Losses in Open Circuit Voltage for an 18-μm Silicon Solar Cell

Abstract: An 18 μm thin crystalline silicon solar cell was demonstrated, and its best open circuit voltage is 642.3 mV. However, this value is far from the cell's theoretical upper limit in an ideal case. This paper explores the open circuit voltage losses of the thin silicon solar cell, starting from the ideal case, through first principle calculation and experiments. The open circuit voltage losses come from the introduced recombination due to the non-ideal surface passivation and contacts integration on front and rea… Show more

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Cited by 6 publications
(5 citation statements)
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“…We ascribe the remaining lost 20 mV to the e‐beam evaporated metallic front contact and/or deposited rear metallic blanket. This latter V OC loss has already been observed in literature and it deals with the surface recombination velocity at metal/semiconductor interface. Notwithstanding these issues, we estimate that a conversion efficiency beyond 23% is at hand for our rear junction PeRFeCT architecture, because i) the optical transparency of the FSF gives a good blue response of the solar cells ( J SC >41 cm 2 ); ii) the carrier‐selective passivating contacts ensure low contact recombination ( V OC >700 mV); iii) industrially relevant metallization techniques such as Cu‐plating (front side) and screen printing (rear side) can greatly reduce series resistance (FF >80%).…”
Section: Resultsmentioning
confidence: 56%
“…We ascribe the remaining lost 20 mV to the e‐beam evaporated metallic front contact and/or deposited rear metallic blanket. This latter V OC loss has already been observed in literature and it deals with the surface recombination velocity at metal/semiconductor interface. Notwithstanding these issues, we estimate that a conversion efficiency beyond 23% is at hand for our rear junction PeRFeCT architecture, because i) the optical transparency of the FSF gives a good blue response of the solar cells ( J SC >41 cm 2 ); ii) the carrier‐selective passivating contacts ensure low contact recombination ( V OC >700 mV); iii) industrially relevant metallization techniques such as Cu‐plating (front side) and screen printing (rear side) can greatly reduce series resistance (FF >80%).…”
Section: Resultsmentioning
confidence: 56%
“…Previously, the detailed Quokka modeling has shown that the surface passivation of an epitaxially grown p + -emitter is the key factor limiting the efficiency of a 15.9% efficient ultrathin Si solar cell. 9) In this work, we demonstrated an enhanced emitter surface passivation by replacing thermal SiO 2 layers with a remote-plasma ALD Al 2 O 3 =PECVD SiN x stack. The advanced emitter surface passivation can reduce the epi-p +emitter saturation current density from 184.9 to 16.2 fA=cm 2 more than a factor of 10.…”
Section: Discussionmentioning
confidence: 95%
“…7) In this work, we demonstrate an enhanced surface passivation of epitaxially grown boron doped emitters employed in on-going development of ultrathin c-Si solar cells on steel. [9][10][11][12][13][14][15] These cells are based on epitaxial growth of c-Si on a porous layer and LTP with an active layer thickness of only 21 µm. In the past, an independently confirmed efficiency of these ultrathin Si cells has reached up to 15.9% with a V oc of 632 mV, a short-circuit current density (J sc ) of 33.7 mA=cm 2 and a fill factor (FF ) of 74.5% on an 88 cm 2 device.…”
Section: Introductionmentioning
confidence: 99%
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“…Indeed, the solar irradiance availability in the planet allows us to get free power once the initial plant investment has been faced [1]. The scientific community has pointed out several improvable aspects, the efficiency of the photovoitaic (PV) cells being of paramount importance [2][3][4]. As no cost is associated with solar energy availability, the proximity of the PV operating point to its maximum power produces the same results as the PV cells with improved efficiency.…”
Section: Introductionmentioning
confidence: 99%