Impact of Voltage-Accelerated Stress on Hole Trapping at Operating Condition

The role of the disordered HfO2 network in the high-κ n-MOSFET shallow electron trapping

“…5,17 Additionally, experimental results obtained through dynamic PBTI measurement reveal that a greater number of the defect centers in the oxide could be repetitively charged/discharged under the low stress field without further degradation, which could be observed on both large and small dimension devices; however, this balance will be broken if the stress condition is changed to harsher parameter. [18][19][20] Up to now, a wellestablished understanding for the above device degradation behaviors is ascribed to the broad spatial spreading of the V O defects in the gate stack and the shallow-level characteristics of them under the PBTI stress. And the trapping/de-trapping of the electrons happened in the defects depends on the nonradiative multiphonon assisted trapping, two steps are included in the procedure: (1) the resonant tunneling of the electrons into the near interface pre-existing defects that responds for the fast trapping/detrapping and (2) further migration of the trapped carrier toward deeper unoccupied traps accounted for the slower trapping/detrapping.…”

A Vacancy-Interstitial Defect Pair Model for Positive-Bias Temperature Stress-Induced Electron Trapping Transformation in the High- $\kappa $ Gate n-MOSFET

“…Recent works [19] have, however, consistently revealed a link between them, whereby part of the recoverable portion may be transformed into a more permanent form as the stressing continues. More recent studies on small-area transistors have unambiguously demonstrated such a recoverable-to-permanent transformation behavior of individual oxide trap [20], [21]. Meanwhile, atomistic simulation studies have provided a microscopic picture of the degradation mechanism [22], [23].…”

Oxide-defects driven study on reliability and synaptic response characterization of logic devices

“…The general understanding is that c and e are functions of applied biases and temperature only and are invariant under a given operating condition. Interestingly, it has been found in some studies [88], [95], [126], [127] that accelerated gate stressing, typical during BTI testing, could change the capture/emission characteristics of some switching traps, showing a volatile nature not only in terms of charge occupancy, but also in terms of the atomic structure of the underlying defects. These effects may impact models or applications that presume trap properties are stress invariant.…”

“…In summary, while the results of Y1 and Y2 with respect to Vd biasing could be explained in terms of their positions along the channel, the apparent increase of Y3's e is surprising, given the trap's near-source position. Since the source region is subjected to the BTI effect during Vd stress, the possibility of Y3 being affected through this mechanism needs to be considered [95], [126]. However, experimental results from the…”

“…To date, much understanding on the characteristics of discrete switching oxide traps (SOTs) that in a small-area MOSFET has been obtained from the perspective of BTI or gate stressing (Vg) studies [86], [88], [93], [126], [127]. On the other hand, comparable to BTI effect, the hot carrier injection (HCI) degradation is also a serious concern [129], [164].…”