Improvement of Reliability in Low-Temperature Polycrystalline Silicon Thin-Film Transistors by Water Vapor Annealing

Abstract

We study the Raman resonance of a Ge quantum dot (QD) array grown pseudomorphically to a Si matrix using low-temperature molecular-beam epitaxy. A change of the resonance energy and the shape of the resonance curve in comparison with bulk Ge are observed. These features are shown to be explained by taking into account QD strain and the quasistationary character of the electronic states responsible for the observed resonance. Application of a model of the two-dimensional critical point of the interband density of states allows us to estimate the damping parameter and localization size of these states. It is shown that the observed enhancement of the resonance amplitude in a QD array as compared to the bulk case is related to transformation of the interband density of states into the δ-function due to quantization of the electron-hole spectrum.

Impact of Underwater Laser Annealing on Polycrystalline Silicon Thin-Film Transistor for Inactivation of Electrical Defects at Super Low Temperature

“…Water vapor involves active species such as hydrogen, oxygen and hydroxyl, and they will inactivate electrical defects such as dangling bonds in gate-SiO and grain boundary of the poly-Si film [20]. From the results of SIMS observation as shown in Figs.…”

“…It is reported that a furnace annealing with water vapor ambient is very effective in order to improve the electrical properties of poly-Si TFTs by the inactivation of electrical defects with active species within water vapor [15]- [17]. Water vapor contains some active species such as hydrogen, oxygen and hydroxyl-radical, and these active species will inactivate electrical defects in gate-insulator and/or poly-Si thin films.…”

Hot-Carrier Immunity of Polycrystalline Silicon Thin Film Transistors Using Silicon Oxynitride Gate Dielectric Formed with Plasma-Enhanced Chemical Vapor Deposition

“…In a poly-Si TFT fabricated on glass, however, degradation associated with Joule heating becomes dominant over the lucky electrons mode because heat generated at CHE condition rapidly raises the temperature of the TFT and accelerates degradation due to the low thermal dissipation of glass. [3][4][5] Thus degradation in the stress condition of V gs % V ds also becomes significant for poly-Si TFTs but is less severe than that caused by DAHC. In this hot-carrier mode, the stress condition of V gs ¼ V ds ¼ 10 V was applied to the TFTs with W=L ¼ 20=6 mm.…”

“…Such low temperature processing often produces a low-quality gate dielectric, which has many fixed charges in a dielectric and trap states at a silicon/dielectric interface. Thus, poly-Si TFTs with the low-quality gate dielectric suffer from hot-carrier-induced degradation including a self-heating effect [3][4][5] in their electrical characteristics at a high-voltage operation. To suppress these hot-carrier effects, a lightly doped drain (LDD) structure has been applied widely to poly-Si TFTs processed with a low temperature.…”

Effective Trapping Reduction in SiO2/GaN MOS Structure by High Pressure Water Vapor Annealing

“…(e.g., post deposition annealing, 4 plasma treatment, 5 incorporation of chemical elements, 6 stack insulators structure 7 ). Among them, annealing with high-pressure water vapor is a simple and green method, which was already proven to decrease fixed charge, 8 reduce the density of silicon dangling bonds, 9,10 reinforce the Si-Si or Si-O bonds 11 and passivate the oxygen vacancies in the dielectrics. [12][13][14] However, the effect and mechanism were mainly demonstrated by qualitative description.…”