Overview on ESD Protection Designs of Low-Parasitic Capacitance for RF ICs in CMOS Technologies

ESD characterization of a 190V LIGBT SOI ESD power clamp structure for plasma display panel applications

“…4, the ratio of simulated R ON for these two devices is R ON,diode /R ON,LIGBT % 2.2. With smaller R ON to restrain the generated joule heat [15], the peak lattice temperature of proposed LIGBT is always lower than that of HV diode at the same discharge current level. When second breakdown occurs, HV diode has very high Vt2 of 374 V, and the peak lattice temperature is as high as 858 K. On the contrary, LIGBT has much better thermal characteristics.…”

Integration of GMR-based spin torque oscillators and CMOS circuitry

“…High frequency circuits implemented in sub-100 nm CMOS processes have very limited ESD robustness [24], so that an on-chip ESD protection is also required to achieve reliable CMOS ICs. Nevertheless, the design of ESD protection for sub-100 nm CMOS ICs is restricted by the trade-off between the ESD robustness and the high operating frequencies due to the parasitics brought by the ESD components.…”

“…For this reason, in this work, the output will be probed for measurement purpose to avoid the unnecessary losses due to bonding wires. Still, the ESD components along with the pad add a considerable parasitic capacitance to the output node, which also limits the CMOS IC operation at high frequencies [24]. In order to obtain a flat frequency response within the band of interest, input and output filters that utilize the parasitics are included in the system.…”

“…The ESD current at the I DC pad can be shunted by the inductor of the bias-tee to the ESD-protected input pad. Possible approaches to implement the ESD protection given in [24] are investigated. ESD diodes are employed and embedded in the input and output filters, so as to achieve large bandwidth at high frequencies and to fully utilize the parasitics introduced by the ESD components.…”

Simulation analysis of electromagnetic susceptibility for 32-Bit digital signal controllers

“…The effectiveness of a RC noise filter is based on an added decoupling capacitor and serial resistors on the internal supply network, which is used to reduce voltage fluctuations on VDD and VSS. To protect circuits from EMI, some hardware solutions are adopted to reduce DSC's susceptibility, such as I/O buffers, clamp junctions, ESD protection designs etc [13]. Indeed, the DSC immunity modeling can help to design and to optimize the decoupling network to improve system EMC.…”