Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors

Abstract

Abstract-The design and performance of next-generation chip multiprocessors (CMPs) will be bound by the limited amount of power that can be dissipated on a single die. We present photonic networks-on-chip (NoC) as a solution to reduce the impact of intrachip and off-chip communication on the overall power budget. The low loss properties of optical waveguides, combined with bit-rate transparency, allow for a photonic interconnection network that can deliver considerably higher bandwidth and lower latencies with significantly lower power dissipation than an interconnection network based only on electronic signaling. We explain why on-chip photonic communication has recently become a feasible opportunity and explore the challenges that need to be addressed to realize its implementation. We introduce a novel hybrid microarchitecture for NoCs that combines a broadband photonic circuit-switched network with an electronic overlay packet-switched control network. This design leverages the strength of each technology and represents a flexible solution for the different types of messages that are exchanged on the chip; large messages are communicated more efficiently through the photonic network, while short messages are delivered electronically with minimal power consumption. We address the critical design issues including topology, routing algorithms, deadlock avoidance, and path-setup/teardown procedures. We present experimental results obtained with POINTS, an event-driven simulator specifically developed to analyze the proposed design idea, as well as a comparative power analysis of a photonic versus an electronic NoC. Overall, these results confirm the unique benefits for future generations of CMPs that can be achieved by bringing optics into the chip in the form of photonic NoCs.

Tools and methodologies for designing energy-efficient photonic networks-on-chip for highperformance chip multiprocessors

“…We label this form of control as space switching for its nature of shifting the entire WDM packet. A variety of onchip spaced-switch networks have previously been proposed [12]- [13].…”

“…Correctly routing optical signals through a space switched network requires electronic control of the electro-optic ring resonators [12]. This task of manipulating and provisioning optical resources is delegated to a control plane.…”

Silicon Multimode Photonic Integrated Devices for on-Chip Mode-Division-Multiplexed Optical Interconnects

“…As modern microprocessors include tens to hundreds of cores on a single die for adequate performance, a very large bandwidth (∼10 2 Tbit/s) is needed for the data communication between the cores and the local/distant caches as well as the off-chip main memory [1,2].…”

“…To meet the bandwidth challenge for data communication, optical interconnects are regarded as a very promising solution [1,2], because one can utilize advanced photonic multiplexing technologies [3], including wavelength-divisionmultiplexing (WDM), polarization-division multiplexing (PDM), and spatial-division multiplexing (SDM), which have been developed and used for long-haul optical fiber communications.…”

Silicon photonic network-on-chip and enabling components

“…In fact, optical interconnects (OI), composed of single fre-quency lasers, fiber optics, fast detectors and wavelength division multiplexing (WDM) systems, have been used for decades in long-distance telecommunications. If the same approach is transplanted into the short-distance communications (e. g. on-and off-chip communications), it will increase the bandwidth, lower the latency and reduce the power consumption [7,8]. Nowadays, most commercial photonic devices are made by III-V group materials such as InP and GaAs, which make them hard to integrate with silicon-based IC, and consequently, expensive.…”