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In this abstract we present a highly manufacturable, high performance 90nm technology with best in class ,performance for 35nm gate-length N and P transistors. Unique, but simple and low cost, process changes have been utilized to modulate channel stress and implant profile to generate enhanced performance with no additional masks. High drive currents of 1193uAium and 587uAium are obtained for nMOS and PMOS transistors respectively at I .2V Vdd and an Ioff of 60nMpm. An industry leading 90nm technology CVil of 0 . 6 1~s and 1 .

The impact of nitrogen concentration on nitrided gate dielectric scaling has been found to depend on the process conditions used to incorporate nitrogen. For example, the variation in the nitrogen content of gate dielectrics processed at high pressure (>107Pa) has a strong impact on gate leakage current, but not on equivalent oxide thickness. While this effect allows nearly independent control of gate leakage and drive currents of the device, it prevents scaling of the gate dielectric. In contrast, it is found that at low process pressures (<13Pa) the gate dielectric behaves in a more conventional fashion, where both electrical oxide thickness and film leakage change with film nitrogen content. A model is proposed to explain this behavior based on an intrinsic reoxidation process. Chemical bond analysis results are presented to support the proposed model.

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