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In this work, we experimentally investigate fundamental aspects of 1/f noise in silicon CMOS transistors, considering a broad group of technological families. We bring out some device down-scaling issues. A direct comparison between our experimental data and the noise dominant theories in MOS-FETs is dealt with.

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A new buried-channel CMOS structure with a straddle-gate architecture is proposed in the present work. It can be carried out within the standard CMOS VLSI technological platform giving rise to both N- and P-type MOSFETs with buried channel. The main electrical features of the novel N-MOS transistor have been experimentally investigated. A significant lowering in 1/f noise and higher carrier mobility have been observed coherently with a bulk-like carrier transport due to the buried channel. The novel device would be promising for both analog and RF circuitry design.

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