No abstract

No abstract

No abstract

Interposer fabrication processes are critical techniques in 3D-IC integration, providing the short interconnection among different stacked chips and the substrate [1]. Nowadays, silicon is a mature material in semiconductor technology, but glass, a dielectric material, provides an attractive option due to its intrinsic characteristics for the advantages of electrical isolation, better RF performance, flexibility with CTE as well as the ability to provide a low cost solution [2].In this investigation, another cost reduction concept of through glass via (TGV) wafer processing is being studied. By leveraging current semiconductor equipment and knowhow, we bond TGV wafers onto glass carriers as shown in Figure 1, the TGV wafer thickness is directly 100um and center diameter (CD) of through glass via is 30 m. This approach provides a method to temporarily bond these TGV wafers to glass carriers enabling handling through processes such as via fill and surface metallization. The ability to form glass at the target 100 um thickness and provide through holes and thus avoid backgrinding processes provides substantial opportunity to save costs and avoid yield loss.