Room-temperature electroluminescence at 1.3 and 1.5 μm from Ge/Si quantum-dot light-emitting diodes is reported. The devices were fabricated in a mesa-type structure, with a silicon oxide layer on the top for surface/sidewall passivation. Different passivation processes were employed. We found that the integrated electroluminescence intensities were relatively less sensitive to temperature, persisting at nearly the same intensity up to RT. The fabricated device shows an internal quantum efficiency of about 0.015% at RT. The improved emission property is attributed to the reduced nonradiative recombination centers due to the surface passivation and thermal treatment.

Photoluminescence investigations on stacked Ge/Si dots with different spacer thicknesses are presented. According to the emission energy shift in the Ge dots, we found that a thinner spacer layer will lead to remarkable Ge–Si intermixing during the stacking of the Ge/Si dots. Such material intermixing not only shallows the dot potential depth, but also softens the sharpness of the dot/spacer interface. In addition, the temperature of photoluminescence quenching also varies with the spacer thickness. Finally, we point out some important factors that are relevant to the room-temperature luminescence efficiency of stacked Ge/Si quantum dots.

State-of-the-art process-strained Si (PSS) technology featuring single-NiSi Schottky source/drain (S/D) and ultra-thin gate oxide of 1.2 nm is demonstrated for L gate down to 39 nm. +10% performance boost of Schottky-Barrier (SB)-PSS NMOS, as compared to its non-Schottky counterpart, is demonstrated due to series resistance reduction of the silicide S/D and enhanced strain effects. Highest SB-PSS PMOS drive current of 821 µA/µm (at V D = −1.2V and I off =100 nA/µm) is recorded when integrated with recessed Si 1-x Ge x S/D stressor.

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