The interrelationships among implantation-induced defect density, carrier activation rate, substrate temperature during nitrogen implantation and annealing in 6H–SiC have been clarified. Several defects, whose energy required for recovery of lattice damage depends on the substrate temperature during implantation, were examined. Although defect density was sufficiently low that it was undetectable by Rutherford backscattering spectrometry, the carrier activation rate was 3.3% under the condition that the implanted nitrogen density was 1.8×1019 cm-3. According to the first principles local-density functional calculation using the cubic SiC crystal model, the complex defect composed of interstitial carbon and substituted nitrogen, which produces a localized electronic state and a half-occupied level in the band gap, is considered to be one cause of the low carrier activation rate in nitrogen-implanted SiC.

This study is part of a project that is aimed at building dynamic boundary conditions near a solid wall, in order to reduce the large eddy simulation spatial resolution that is necessary in this region. The objective is to build a low-order dynamical system in a plane parallel to the wall, which will mimic the unsteady behaviour of turbulence. This dynamical system should be derived from a POD decomposition of the velocity field. The POD decomposition is to be applied on an experimental database of time-resolved velocity fields. In order to obtain the experimental database, a specific experiment of high-speed stereoscopic particle image velocimetry (PIV) has been performed. This experiment was carried out in the turbulent boundary layer of the LML wind tunnel. The plane under study was parallel to the wall located at 100 wall units. This database is validated via comparison with hot-wire anemometry (HWA). Despite some peak locking observed on the streamwise velocity component, the PDF and the power spectra are in very good agreement with the HWA results. The two-point spatial correlations are also in good agreement with the results from the literature. As the flow is time-resolved, space-time correlations are also computed. The convection of the flow structure is observed to be the most important effect at this wall distance. The next step is to compute the dynamical system and to couple it to a large eddy simulation.

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We have successfully developed the record high blocking voltage of 750 V and the largest current capability of 4.5 A silicon-on-insulator (SOI) micro-inverter IC, which is made possible by the newly developed high voltage reliability technology and high-speed and low-dissipation extraction enhanced lateral insulated gate bipolar transistor (E2LIGBT). It has been found, for the first time, that the stable and reliable high blocking voltage of 760 V is assured by controlling the sheet-resistance of the polycrystalline silicon (poly-Si) layer of the scroll-shaped resistive field plate (SRFP). The high voltage and high reliability SOI power IC technology is expected as the key technology enabling 750 V 4.5 A micro-inverter IC for harsh applications such as automotive electronics.

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