The extendibility of alternating aperture phase shifting masks (AAPSM) is investigated using reticle topography simulation. Aerial image measurements with an ArF AIMS tool are used to calibrate the simulated performance of the AAPSM. Simulations are performed for several illumination conditions through pitch allowing understanding of reticle performance that will be required to reach the 70nm node. Simulation convergence, speed, and memory requirements are also reported on for Solid CM.Experimental AIMS data are analyzed to extract the effective phase through pitch for several etch targets. These phase measurements are compared to simulations using AFM characterization of the same mask. Simulated aerial images through pitch are directly compared to those measured on AIMS. Qualitative agreement between AIMS and simulated images is obtained, but the contrast of the AIMS images is consistently lower.Image balance sensitivity, phase error sensitivity, and quartz sidewall angle sensitivity are defined and examined to identify performance limiting aspects of implementing AAPSM for the 70nm node over a range of pitches. Example phase sensitivity values are derived using mask topography simulation and used to define phase error specifications. AIMS and mask topography simulation show that smaller pitches and spaces are more sensitive to etch depth variation. Simulation also reveals quartz sidewall angle variation results in an apparent phase error where an under-cut behaves like an over-etch and inward sloping sidewalls behave like an under-etch. A correction to the well known etch target formula is proposed to account for sidewall angle variation.

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%675$&7The paramount importance of CD-control for logic speed is well recognized. Whereas across wafer-line-widthvariation (AWLV) influences the width of the speed distribution, across chip line-width-variation (ACLV) is a dominating factor for device leakage. In our study we will discuss different ACLV-terms based on AMD's 0.18 and 0.13µm processes. We will show how the variation of different scanner and reticle-parameters affects both random and systematic ACLV-components. We will show that the systematic part either can be dominated by global or layoutspecific CD-signature, depending on the reticle manufacturing process, scanner condition and the circuit design. In particular we will discuss the impact of defocus, lens aberrations, illumination uniformity dose accuracy and flare. Eventually, we will show the response of critical performance parameters of state of the art µPs and we will judge different parameters with respect to their impact on µP-speed. Focus control and flare control are found to be the most critical tasks. We will discuss appropriate methods to ensure both focus and flare don't affect device performance negatively..H\ZRUGV ACLV, scanner, reticle, flare, microprocessor, focus, dose control, Iso-dense-bias ,1752'8&7,21 'HYLFH VSHHG DQG &'YDULDWLRQ To improve the speed of a microprocessor (µP), decreasing the CD is one of the key knobs in conjunction with transistor improvement. The relationship between the CD and the speed of a device is usually linear. Meanwhile, 1nm CD accounts for more than 20MHz speed difference. In difference to the mean CD of a device, CD-variation is a parameter that cannot such easily be correlated to speed. However, if it exceeds a certain limit the device leakage increases thus influences both maximum speed and yield /1/. But: which CD-variation is allowed, the often-mentioned ±10%? The reality is more complicated. If a new device is designed, a certain CD-variation-budget is given as a kind of technology capability input into the device-model. The total product leakage depends on both the absolute CD and the CD-variation. (fig.1). In case of an un-allowed high CD-variation within a die, the leakage "brake through" appears at much lower speed than in the optimum case.WKH QDWXUH RI &'YDULDWLRQ CD-variations occur both across wafer (AWLV) and across the scanner field. AWLV results in different mean CD's of individual devices, thus affecting the speed distribution. Across wafer CD-variations are primarily determined by resist processing and etch but are also affected by leveling-and dose-control of the scanner. Across-chip (field)-CDvariation has a more complex nature than AWLV. Usually we have more than one die within the scanner field. Thus CD-variations across the field can have a double impact: 1. they may influence the die-to die-speed distribution, and 2.CD-variations may have, if they exceed the above discussed limit, an impact on leakage current and the maximum possible speed. The nature of CD-variation within an exposed production reticle is twofold: Due to im...